A study of the residue-to-binary converters for the three-moduli sets

In this paper, a detailed study on the four three-moduli sets reported in the literature is carried out from the point of view of the hardware complexity and speed of their residue-to-binary (R/B) converters. First, a new formulation of the Chinese remainder theorem is proposed that reduces the size of the modulo operation. Then, the proposed formulation is applied to derive, in a simple and unified manner, R/B conversion algorithms for three of the sets. Further, using this formulation, a new algorithm along with two corresponding R/B converters for the fourth set is proposed; one of these converters is area efficient while the other is speed efficient. Next, the best R/B converter(s) for each of the sets is chosen based on the hardware complexity and/or speed. These converters are implemented for 8, 16, 32, and 64-bit dynamic ranges, using CMOS VLSI technology. Based on a post-layout performance evaluation for the VLSI implementations of the chosen converters, it is shown that in order to represent 8-, 16-, 32-, and 64-bit binary numbers, the moduli set {2ⁿ,2ⁿ+1,2ⁿ-1} provides the fastest R/B converter and requires the smallest area.