DocumentCode
1155649
Title
A Minimum Test Set for Multiple Fault Detection in Ripple Carry Adders
Author
Cheng, Wu-tung ; Patel, Janak H.
Author_Institution
Engineering Research Center, AT&T
Issue
7
fYear
1987
fDate
7/1/1987 12:00:00 AM
Firstpage
891
Lastpage
895
Abstract
Previous papers have shown that a ripple carry adder composed of several full adder cells can be completely tested by a minimum test set of size 8 independent of the number of cells in the ripple carry adder under single faulty cell assumption. The fault model assumed is that faults in a cell can change the cell behavior in any arbitrary way, as long as the cell remains a combinational circuit. In this paper, we assume that any number of cells can be faulty at any time. A minimum test set of size 11 which can detect arbitrary length ripple carry adders under this fault model is presented. For general (N, p) adders in which each cell is a p-bit adder, a minimum test set of size 3 × 22P − 1 is also presented.
Keywords
Adders; iterative logic arrays; minimum test set; multiple fault detection; testing; Adders; Circuit faults; Circuit testing; Combinational circuits; Electrical fault detection; Fault detection; Logic arrays; Logic testing; Topology; Vectors; Adders; iterative logic arrays; minimum test set; multiple fault detection; testing;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.1987.1676985
Filename
1676985
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