Title :
An ISDN echo-cancelling transceiver chip set for 2B1Q coded U -interface
Author :
Takahashi, Yutaka ; Takahara, Masahiro ; Makabe, Takayoshi ; Inami, Daijiro ; Ohno, Masahiko ; Nakagawa, Fujio ; Koyama, Tetsu ; Sugiyama, Akihiko ; Chatani, Masao ; Ikeda, Renya
Author_Institution :
NEC Corp., Kawasaki, Japan
fDate :
12/1/1989 12:00:00 AM
Abstract :
A three-chip set for a 2B1Q U-interface transceiver has been developed. The chip set is composed of an analog front-end (AFE), echo-canceller (EC), and receiver (RCV) LSIs. The AFE LSI includes a 12-b accuracy oversampling analog/digital converter. The EC and RCV LSIs are 26- and 16-bit microprogrammable digital signal processors, respectively. A digital phase-locked loop is used to minimize the analog part. Residual echo increase by a timing phase jump is compensated for by a newly introduced additional adaptive filter. Infinite impulse response filters and multiresponse filters reduce the necessary number of taps for both the echo canceller and the decision-feedback equalizer. The AFE and the two digital signal processor LSIs are implemented in 1.6- and 1.2-μm double-metal layer CMOS processes, respectively. A 6-km loop coverage was realized with a less than 10-7 error rate. Total power consumption by the chip set is 580 mW at 5-V single supply
Keywords :
CMOS integrated circuits; ISDN; computerised signal processing; data communication equipment; digital signal processing chips; echo suppression; large scale integration; telecommunications computing; transceivers; 1.2 micron; 1.6 micron; 16 bit; 26 bit; 2B1Q coded U-interface; 5 V; 5-V single supply; 580 mW; IIR filters; ISDN; LSI devices; adaptive filter; analog front-end; analog/digital converter; compensation; decision-feedback equalizer; digital PLL; digital signal processors; double-metal layer CMOS processes; echo-cancelling; microprogrammable DSP; multiresponse filters; oversampling ADC; phase-locked loop; power consumption; three-chip set; timing phase jump; transceiver chip set; Adaptive filters; Analog-digital conversion; Digital signal processors; Echo cancellers; IIR filters; ISDN; Large scale integration; Phase locked loops; Timing; Transceivers;
Journal_Title :
Solid-State Circuits, IEEE Journal of
