Understanding MOSFET mismatch for analog design

Despite the significance of matched devices in analog circuit design, mismatch modeling for design application has been lacking. This paper addresses misconceptions about MOSFET mismatch for analog design. V_t mismatch does not follow a simplistic 1/(√area) law, especially for wide/short and narrow/long devices, which are common geometries in analog circuits. Further, V_t and gain factor are not appropriate parameters for modeling mismatch. A physically based mismatch model can be used to obtain dramatic improvements in prediction of mismatch. This model is applied to MOSFET current mirrors to show some nonobvious effects over bias, geometry, and multiple-unit devices.