Synthesis of Electronic Bistable Circuits

In this report a synthesis procedure is developed to generate the dc configurations of new (as well as existing) electronic bistable circuits. Of particular interest are those semiconductor configurations employing three-terminal active devices which in themselves are not potentially bistable. To accomplish the above task, devices and/or electronic mechanisms are modeled in a unified manner using a controlled-resistance (conductance) model. In a systematic fashion, all possible combinations of two threeterminal device configurations are inspected and a drastic simplification to six basic configurations is made without loss of generality. Particular devices are next introduced and further eliminations are made. From the remaining possible bistable configurations, existing bistable circuits are generated together with at least two new circuits. Bistable operation of these two new circuits is confirmed by experiment.