Title :
Optimizing Polynomial Expressions by Algebraic Factorization and Common Subexpression Elimination
Author :
Hosangadi, Anup ; Fallah, Farzan ; Kastner, Ryan
Author_Institution :
Dept. of Electr. & Comput. Eng., California Univ., Santa Barbara, CA
Abstract :
Polynomial expressions are frequently encountered in many application domains, particularly in signal processing and computer graphics. Conventional compiler techniques for redundancy elimination such as common subexpression elimination (CSE) are not suited for manipulating polynomial expressions, and designers often resort to hand optimizing these expressions. This paper leverages the algebraic techniques originally developed for multilevel logic synthesis to optimize polynomial expressions by factoring and eliminating common subexpressions. The proposed algorithm was tested on a set of benchmark polynomial expressions where savings of 26.7% in latency and 26.4% in energy consumption were observed for computing these expressions on the StrongARM SA1100 processor core. When these expressions were synthesized in custom hardware, average energy savings of 63.4% for minimum hardware constraints and 24.6% for medium hardware constraints over CSE were observed
Keywords :
high level synthesis; logic design; multivalued logic; polynomials; StrongARM SA1100 processor core; algebraic factorization; algebraic techniques; common subexpression elimination; hardware constraints; multilevel logic synthesis; polynomial expression optimization; Application software; Computer graphics; Design optimization; Hardware; Logic functions; Optimizing compilers; Polynomials; Signal processing; Signal processing algorithms; Signal synthesis; Circuit complexity; common subexpression elimination (CSE); high-level synthesis; polynomials;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
DOI :
10.1109/TCAD.2006.875712