DocumentCode :
1158515
Title :
A 5.1-GHz 1.9-mW GaAs binary frequency divider
Author :
Sadler, Robert A. ; Geissberger, Arthur E. ; Singh, Hausla P.
Author_Institution :
ITT Gallium Arsenide Technol. Center, Roanoke, VA, USA
Volume :
10
Issue :
10
fYear :
1989
Firstpage :
440
Lastpage :
442
Abstract :
A GaAs divide-by-two circuit operating at a clock rate of 5.1 GHz and dissipating only 1.9 mW has been demonstrated. This represents the best room-temperature speed-power performance yet reported for any flip-flop. The D-type flip-flop owes its high performance to a 0.5- mu m TiWN self-aligned gate fabrication process using low-capacitance dielectric material. The speed-power performance with this process is compared to other recent results for high-speed frequency dividers.<>
Keywords :
III-V semiconductors; dividing circuits; flip-flops; gallium arsenide; 0.5 micron; 1.9 mW; D-type; GaAs; TiWN; binary frequency divider; clock rate; flip-flop; high-speed frequency dividers; low-capacitance dielectric material; room-temperature speed-power performance; self-aligned gate fabrication process; Circuits; Clocks; Dielectric materials; Fabrication; Flip-flops; Frequency conversion; Gallium arsenide;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/55.43093
Filename :
43093
Link To Document :
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