A rate adaption coprocessor for terminal adapters and U-interface modems

Author

Busschaert, Hans J. ; Reusens, Peter P. ; Rabaey, Dirk H. ; Verpooten, Luc M.

Author_Institution

Alcatel Bell Telephone, Antwerp, Belgium

Volume

24

Issue

6

fYear

1989

fDate

12/1/1989 12:00:00 AM

Firstpage

1625

Lastpage

1633

Abstract

A multistandard rate adapter coprocessor chip, designed for use in ISDN terminal adapters and U-interface modems, is presented. It provides a compact, low-power protocol converter to connect asynchronous (up to 19200 b/s) and synchronous (up to 64 kb/s) data terminal equipment with any digital 64-kb/s network. The multistandard rate adapter chip was developed in a 2-μm CMOS technology using a hierarchical design methodology. The rate adapter is the cornerstone of a 144-kb/s U-interface modem and a major breakthrough for the next-generation multistandard terminal adapter

Keywords

CMOS integrated circuits; ISDN; computerised signal processing; data communication equipment; digital communication systems; digital signal processing chips; modems; satellite computers; telecommunications computing; 1.92 kbit/s; 144 kbit/s; 2 micron; 64 kbit/s; CMOS technology; ISDN; U-interface modems; asynchronous DTE; data terminal equipment; digital network connection; hierarchical design methodology; low-power protocol converter; multistandard coprocessor chip; rate adaption coprocessor; synchronous DTE; terminal adapters; Application software; Coprocessors; Digital signal processors; Energy consumption; ISDN; Modems; Protocols; Read only memory; Read-write memory; Telephony;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.44998

Filename

44998