DocumentCode
1159739
Title
Modeling Advanced FET Technology in a Compact Model
Author
Dunga, Mohan V. ; Lin, Chung-Hsun ; Xi, Xuemei ; Lu, Darsen D. ; Niknejad, Ali M. ; Hu, Chenming
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA
Volume
53
Issue
9
fYear
2006
Firstpage
1971
Lastpage
1978
Abstract
The need for meeting the expectations of continuing the enhancement of CMOS performance and density has inspired the introduction of new materials into the classical single-gate bulk MOSFET and the development of nonclassical multigate transistors at an accelerated rate. There is a strong need to understand and model the associated new physics and electrical behavior to ensure widespread very-large-scale-integration circuit applications of new technologies. This paper presents some of the efforts toward the modeling of new technologies for bulk MOSFETs and multigate transistors. A holistic model for mobility enhancement through process-induced stress and a dynamic behavior model for high-k transistors have been developed to capture some of the new effects and new materials in the bulk MOSFET. A new analytical model is also presented for the fundamentally new device structure-FinFET
Keywords
MOSFET; VLSI; carrier mobility; semiconductor device models; FinFET; VLSI; advanced FET technology; analytical model; bulk MOSFET; compact model; dynamic behavior model; electrical behavior; high-k transistors; holistic model; mobility enhancement; multigate transistors; process-induced stress; Acceleration; CMOS technology; FETs; High K dielectric materials; MOSFET circuits; Physics; Semiconductor device modeling; Stress; Transistors; Very large scale integration; Berkeley short-channel insulated-gate FET model (BSIM); MOSFET; compact modeling; dielectrics; double-gate MOSFETs (DG-MOSFETs); high-; process-induced strain;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/TED.2005.881001
Filename
1677831
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