Title :
System-on-a-programmable-chip development platforms in the classroom
Author :
Hall, Tyson S. ; Hamblen, James O.
Author_Institution :
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
Abstract :
This paper describes the authors´ experiences using a system-on-a-programmable-chip (SOPC) approach to support the development of design projects for upper-level undergraduate students in their electrical and computer engineering curriculum. Commercial field-programmable gate-array (FPGA)-based SOPC development boards with reduced instruction set computer (RISC) processor cores are used to support a wide variety of student design projects. A top-down rapid prototyping approach with commercial FPGA computer-aided design tools, a C compiler targeted for the RISC soft-processor core, and a large FPGA with memory is used and reused to support a wide variety of student projects.
Keywords :
CAD; computer aided instruction; design engineering; educational courses; electrical engineering education; field programmable gate arrays; instruction sets; software prototyping; system-on-chip; FPGA; computer engineering curriculum; computer-aided design tools; design projects; electrical engineering curriculum; field-programmable gate-array; rapid prototyping; reduced instruction set computer processor; system-on-a-programmable-chip development; upper-level undergraduate students; Computer aided instruction; Costs; Design automation; Field programmable gate arrays; Hardware design languages; Integrated circuit synthesis; Logic devices; Programmable logic arrays; Reduced instruction set computing; System-on-a-chip; 65; Altera; FPGA; Nios; SOC; SOPC; Xilinx; field-programmable gate array; microblaze; processor core; system on a chip; system on a programmable chip;
Journal_Title :
Education, IEEE Transactions on
DOI :
10.1109/TE.2004.825926
