Title :
A neural net arbitrator for large crossbar packet-switches
Author :
Marrakchi, Abdellatif ; Troudet, Terry
Author_Institution :
Bellcore, Red Bank, NJ, USA
fDate :
7/1/1989 12:00:00 AM
Abstract :
A Hopfield neural net architecture is proposed to control a crossbar switch in real time in order to effect the switching of packets at very high rates with maximum throughput. The performance of the net and the time needed for the analog computation are estimated from a numerical simulation of the real-time evolution of the neural states. An optimized VLSI implementation of an 8×8 neural net controller in 2-μm CMOS technology is described
Keywords :
CMOS integrated circuits; VLSI; neural nets; packet switching; 2 micron; CMOS technology; Hopfield neural net; analog computation; crossbar packet-switches; neural net arbitrator; optimized VLSI implementation; real time; real-time evolution; throughput; Analog computers; CMOS technology; Computer architecture; Hopfield neural networks; Neural networks; Numerical simulation; Packet switching; State estimation; Switches; Throughput;
Journal_Title :
Circuits and Systems, IEEE Transactions on
