DocumentCode :
11608
Title :
A 
-Based Noise Optimization for CMOS Folded-Cascode Operational Amplifier
Author :
Ou, Jinping ; Ferreira, Pedro M.
Author_Institution :
Dept. of Eng. Sci., Sonoma State Univ., Rohnert Park, CA, USA
Volume :
61
Issue :
10
fYear :
2014
fDate :
Oct. 2014
Firstpage :
783
Lastpage :
787
Abstract :
Noise optimization is a challenging problem for nanoscale metal-oxide-silicon field-effect transistor circuits. This brief presents a technique that uses transconductance-to-drain current (gm/ID)-dependent transistor-noise parameters to explore the design space and to evaluate tradeoff decisions. An expression for the corner frequency of the folded-cascode amplifier is derived. The design process demonstrated in this brief using the folded-cascode amplifier is applicable to a wide class of amplifier circuits.
Keywords :
CMOS analogue integrated circuits; MOSFET; integrated circuit design; integrated circuit noise; operational amplifiers; optimisation; CMOS folded-cascode operational amplifier; gm-ID-based noise optimization; nanoscale metal-oxide-silicon field-effect transistor circuit; transconductance-to-drain current-dependent transistor-noise parameter; CMOS integrated circuits; Current density; Logic gates; Noise; Space exploration; Thermal noise; Transistors; $g_{m}/I_{D}$ circuit design; Analog circuit design; noise analysis;
fLanguage :
English
Journal_Title :
Circuits and Systems II: Express Briefs, IEEE Transactions on
Publisher :
ieee
ISSN :
1549-7747
Type :
jour
DOI :
10.1109/TCSII.2014.2345297
Filename :
6871356
Link To Document :
