DocumentCode
1160907
Title
Accurate and scalable RF interconnect model for silicon-based RFIC applications
Author
Sia, Choon Beng ; Ong, Beng Hwee ; Yeo, Kiat Seng ; Ma, Jian-Guo ; Do, Manh Anh
Author_Institution
Adv. RFIC Pte. Ltd., Singapore
Volume
53
Issue
9
fYear
2005
Firstpage
3035
Lastpage
3044
Abstract
A new figure of merit, intrinsic factor for interconnects, is proposed to provide insights as to how back-end metallization influences the performance of radio frequency integrated circuits. An accurate and scalable double-π radio frequency interconnect model, continuous across physical dimensions of width and length, is presented to demonstrate reliable predictions of interconnect characteristics up to 10 GHz. Using this interconnect model in gigahertz amplifier and voltage-controlled oscillator circuit simulations yields excellent correlations between simulated and on-wafer measured circuit results.
Keywords
integrated circuit interconnections; integrated circuit modelling; microwave integrated circuits; RF interconnect model; SPICE models; back end metallization; figure of merit; intrinsic factor; quality factor; radiofrequency integrated circuit; series resistance; skin effect; substrate loss; Circuit simulation; Integrated circuit interconnections; Integrated circuit metallization; Integrated circuit reliability; Integrated circuit yield; Predictive models; Radio frequency; Radiofrequency amplifiers; Radiofrequency integrated circuits; Voltage-controlled oscillators; Inductance; SPICE models; interconnects; intrinsic factor; metallization; parasitics; quality factor; radio frequency (RF); series resistance; skin effects; substrate loss;
fLanguage
English
Journal_Title
Microwave Theory and Techniques, IEEE Transactions on
Publisher
ieee
ISSN
0018-9480
Type
jour
DOI
10.1109/TMTT.2005.854218
Filename
1505029
Link To Document