DocumentCode :
1162182
Title :
The design of efficiently-encodable rate-compatible LDPC codes - [transactions papers]
Author :
Kim, Jaehong ; Ramamoorthy, Aditya ; McLaughlin, Steven W.
Author_Institution :
Samsung Electron. Co., Ltd., Yongin
Volume :
57
Issue :
2
fYear :
2009
fDate :
2/1/2009 12:00:00 AM
Firstpage :
365
Lastpage :
375
Abstract :
We present a new class of irregular low-density parity-check (LDPC) codes for moderate block lengths (up to a few thousand bits) that are well-suited for rate-compatible puncturing. The proposed codes show good performance under puncturing over a wide range of rates and are suitable for usage in incremental redundancy hybrid-automatic repeat request (ARQ) systems. In addition, these codes are linear-time encodable with simple shift-register circuits. For a block length of 1200 bits the codes outperform optimized irregular LDPC codes and extended irregular repeat-accumulate (eIRA) codes for all puncturing rates 0.6~0.9 (base code performance is almost the same) and are particularly good at high puncturing rates where good puncturing performance has been previously difficult to achieve.
Keywords :
automatic repeat request; block codes; linear codes; parity check codes; shift registers; ARQ; incremental redundancy hybrid-automatic repeat request system; linear-time encoding; low-density parity-check codes; moderate block length code; rate-compatible LDPC codes; rate-compatible puncturing; shift-register circuits; Appropriate technology; Automatic repeat request; Circuits; Decoding; Digital video broadcasting; Error correction; Parity check codes; Redundancy; Sparse matrices; Throughput; Efficient encoding, low-density parity-check (LDPC) code, puncturing, rate-compatible code.;
fLanguage :
English
Journal_Title :
Communications, IEEE Transactions on
Publisher :
ieee
ISSN :
0090-6778
Type :
jour
DOI :
10.1109/TCOMM.2009.02.060233
Filename :
4784346
Link To Document :
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