• DocumentCode
    1162842
  • Title

    On empty rooms in floorplan graphics: comments on a deficiency in two papers

  • Author

    Cai, H.

  • Author_Institution
    Dept. of Electr. Eng., Delft Univ. of Technol., Netherlands
  • Volume
    8
  • Issue
    7
  • fYear
    1989
  • fDate
    7/1/1989 12:00:00 AM
  • Firstpage
    795
  • Lastpage
    797
  • Abstract
    Floorplan graphs are used in many placement and routing systems for VLSI building-block layout. S. Kimura et al.(ibid., vol. CAD-2, p.285-92, Oct. 1983) and W.M. Dai (ibid., vol.CAD-4, p.189-97, July 1985) proposed algorithms to construct such a graph from a geometrical placement of the building blocks and to define a channel structure from the floorplan graph. In the absence of empty rooms in the floorplan graph the algorithms can correctly derive a channel definition and ordering from the graph. However, in the case that there are empty rooms present in the floorplan graph, neither algorithm can guarantee a correct solution. A counterexample is given to point out the deficiency. A correction to the RRDO algorithm given by Dai et al. is presented
  • Keywords
    VLSI; circuit layout CAD; RRDO algorithm; VLSI building-block layout; algorithms; channel definition; channel structure; empty rooms; floorplan graphics; geometrical placement; placement systems; routing systems; Computer aided instruction; Design automation; Graphics; Layout; Routing; Tiles; Very large scale integration; Wiring;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/43.31536
  • Filename
    31536