• DocumentCode
    1163412
  • Title

    CSDC: a new complexity reduction technique for multiplierless implementation of digital FIR filters

  • Author

    Wang, Yongtao ; Roy, Kaushik

  • Author_Institution
    Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
  • Volume
    52
  • Issue
    9
  • fYear
    2005
  • Firstpage
    1845
  • Lastpage
    1853
  • Abstract
    We present a computation reduction technique called computation sharing differential coefficient (CSDC) method, which can be used to obtain low-complexity multiplierless implementation of finite-impulse response (FIR) filters. It is also applicable to digital signal processing tasks involving multiplications with a set of constants. The main component of our proposed CSDC method is to combine the strength of the augmented differential coefficient approach and subexpression sharing. Exploring computation reuse through algorithmic equivalence, the augmented differential coefficient approach greatly expands the design space by employing both differences and sums of filter coefficients. The expanded design space is represented by an undirected and complete graph. The problem of minimizing the adder cost (the number of additions/subtractions) for a given filter is transformed into a problem of searching for an appropriate subexpression set that leads to a minimal adder cost. A heuristic search algorithm based on genetic algorithm is developed to search for low-complexity solutions over the expanded design space in conjunction with exploring subexpression sharing. It is shown that up to 70.1% reduction in the adder cost can be obtained over the conventional multiplierless implementation. Comparison with several existing techniques based on the available data shows that our method yields comparable results for multiplierless FIR filter implementation.
  • Keywords
    FIR filters; adders; computational complexity; genetic algorithms; graph theory; logic design; network synthesis; adder cost minimization; algorithmic equivalence; augmented differential coefficient approach; complexity reduction technique; computation sharing differential coefficient method; digital FIR filters; digital signal processing tasks; finite-impulse response filters; genetic algorithms; heuristic search algorithm; low-complexity multiplierless FIR filters; multiplierless implementation; subexpression sharing; undirected graph; Algorithm design and analysis; Costs; Digital filters; Digital signal processing; Energy efficiency; Finite impulse response filter; Genetic algorithms; IIR filters; Signal processing algorithms; Wireless communication; Common subexpression elimination (CSE); complexity reduction; differential coefficient; digital finite-impulse response (FIR) filter; genetic algorithm;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems I: Regular Papers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1549-8328
  • Type

    jour

  • DOI
    10.1109/TCSI.2005.852208
  • Filename
    1506984