DocumentCode :
1163676
Title :
Design of MOS networks in single-rail input logic for incompletely specified functions
Author :
Lai, Hung Chi ; Muroga, Saburo
Author_Institution :
Dept. of Comput. Sci., Illinois Univ., Urbana, IL, USA
Volume :
7
Issue :
3
fYear :
1988
fDate :
3/1/1988 12:00:00 AM
Firstpage :
339
Lastpage :
345
Abstract :
If a logic gate in a logic network of MOS transistors expresses a negative function, which is a logic function that can be expressed as the complement of a disjunctive form of only noncomplemented variables, it is called a negative gate. An algorithm, DIMN, for the design of a MOS logic network with a minimum number of negative gates and irredundant connections among negative gates for a completely specified function was published by the authors in 1985. DIMN is extended here to the case of an incompletely specified function, and an example is given
Keywords :
field effect integrated circuits; integrated logic circuits; logic design; DIMN; MOS networks; incompletely specified functions; irredundant connections; logic gate; minimum negative gates; single-rail input logic; Algorithm design and analysis; Bipolar transistors; Energy consumption; Intelligent networks; Lattices; Logic design; Logic functions; Logic gates; MOSFETs; Testing;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/43.3167
Filename :
3167
Link To Document :
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