Title :
CARLOS: an automated multilevel logic design system for CMOS semi-custom integrated circuits
Author :
Mathony, Hans-Jörg ; Baitinger, Utz G.
Author_Institution :
ITIV Karlsruhe Univ., West Germany
fDate :
3/1/1988 12:00:00 AM
Abstract :
CARLOS, a program system for the automated synthesis of random combinational CMOS logic, is described. The input of CARLOS is a specification of a multiple-output Boolean function in the form of a truth table. CARLOS produces an optimized random logic circuit composed of NAND, NOR, and complex gates under the given fan-in and fan-out limitations. The algorithms implemented in CARLOS are based on logic minimization, novel multiple-output multilevel factoring strategies, and recursive technology mapping. The factorization algorithm performs multiple-output synthesis using an algebraic representation of multiple-output Boolean functions. Tests on a large set of examples have shown the efficiency of the synthesis in terms of circuit size as well as computation time. CARLOS is an integral part of a larger CAD system that supports the automatic logic and physical design of finite-state machines under gate-array constraints
Keywords :
CMOS integrated circuits; circuit CAD; combinatorial circuits; integrated logic circuits; logic CAD; many-valued logics; CAD system; CARLOS; NAND gates; NOR gates; automated multilevel logic design system; automated synthesis; complex gates; computer aided design; factorization algorithm; logic minimization; multiple-output Boolean function; multiple-output multilevel factoring strategies; optimized random logic circuit; program system; random combinational CMOS logic; recursive technology mapping; semi-custom integrated circuits; semicustom IC; truth table; Boolean functions; CMOS integrated circuits; CMOS logic circuits; Circuit synthesis; Circuit testing; Combinational circuits; Integrated circuit synthesis; Logic design; Minimization; Process design;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
