DocumentCode :
1163752
Title :
A 50-V, 0.7-m Omega *cm/sup 2/, vertical-power DMOSFET
Author :
Shenai, Krishna ; Korman, Charles S. ; Baliga, B.J. ; Piacente, P.A.
Author_Institution :
General Electric Corp. Res. & Dev. Center, Schenectady, NY, USA
Volume :
10
Issue :
3
fYear :
1989
fDate :
3/1/1989 12:00:00 AM
Firstpage :
101
Lastpage :
103
Abstract :
A 50-V vertical power MOSFET with extremely low specific on resistance is reported. Devices with a cell density as high as 8 million cells/in/sup 2/ and capable of switching 160 A of current have been successfully fabricated using an improved fabrication technology which used low processing temperatures, double-layer interlevel dielectric, shallow source implants, and an improved source contact metallurgy. The lowest measured specific on resistances are 0.8 and 0.7 m Omega *cm/sup 2/, respectively, under continuous and pulsed bias conditions for FETs capable of blocking 50 V in the reverse direction. This result represents the best ever reported forward conductivity for a 50-V power MOSFET.<>
Keywords :
insulated gate field effect transistors; power transistors; 0.7 mohm; 50 V; DMOSFET; cell density; double-layer interlevel dielectric; fabrication technology; forward conductivity; processing temperatures; pulsed bias conditions; shallow source implants; source contact metallurgy; specific on resistance; vertical-power; Dielectric devices; Dielectric measurements; Electrical resistance measurement; FETs; Fabrication; Implants; MOSFET circuits; Power MOSFET; Pulse measurements; Temperature;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/55.31682
Filename :
31682
Link To Document :
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