DocumentCode :
11639
Title :
Parallel Architecture for Battery Charge Equalization
Author :
Bo Dong ; Ye Li ; Yehui Han
Author_Institution :
Dept. of Electr. Eng., Tsinghua Univ., Beijing, China
Volume :
30
Issue :
9
fYear :
2015
fDate :
Sept. 2015
Firstpage :
4906
Lastpage :
4913
Abstract :
One limitation of many battery charge equalizers is their slow equalization speed, especially when there are a large number of batteries in the series-string in high-voltage and high-power applications. This paper presents a new architecture for battery charge equalization. In this architecture, independent equalizers are placed in different layers and all the layers can equalize the corresponding batteries simultaneously, thus reducing equalization time by 50%. We explore the operation, performance characteristics, and the design of the architecture. Both simulation and experimental results are presented to validate the analysis in this paper.
Keywords :
battery powered vehicles; hybrid electric vehicles; battery charge equalization; independent equalizer; parallel architecture; Batteries; Computer architecture; Equalizers; Inductors; Switches; System-on-chip; Topology; Battery; Charger; DC-DC Converters; Equalizers; charger; dc???dc converters; equalizers;
fLanguage :
English
Journal_Title :
Power Electronics, IEEE Transactions on
Publisher :
ieee
ISSN :
0885-8993
Type :
jour
DOI :
10.1109/TPEL.2014.2364838
Filename :
6936381
Link To Document :
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