DocumentCode :
1163990
Title :
Power System Voltage Stability
Author :
Abe, S. ; Fukunaga, Y. ; Isono, A. ; Kondo, B.
Author_Institution :
Hitachi Research Lab., Hitachi, Ltd.
Issue :
10
fYear :
1982
Firstpage :
3830
Lastpage :
3840
Abstract :
Power system voltage stability is characterized as being capable of maintaining load voltage magnitudes within specified operating limits under steady state conditions. In this paper, the first order delay model of a load admittance change is introduced. Then, using this model, a set of linearized dynamic equations is derived and stability conditions are obtained. An earlier result in the literature is shown to agree with that in this paper. The stability conditions are tested and verified in a 2-load, 2- power source system and a 13-node, 4-power source system.
Keywords :
Admittance; Delay; Equations; Load modeling; Power system dynamics; Power system modeling; Power system stability; Steady-state; System testing; Voltage;
fLanguage :
English
Journal_Title :
Power Apparatus and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9510
Type :
jour
DOI :
10.1109/TPAS.1982.317069
Filename :
4111197
Link To Document :
بازگشت