• DocumentCode
    1164281
  • Title

    Ultrafast Measurement on NBTI

  • Author

    Du, G.A. ; Ang, D.S. ; Teo, Z.Q. ; Hu, Y.Z.

  • Author_Institution
    Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore
  • Volume
    30
  • Issue
    3
  • fYear
    2009
  • fDate
    3/1/2009 12:00:00 AM
  • Firstpage
    275
  • Lastpage
    277
  • Abstract
    We combine customary pulsed I- V setup with a simple linear drain-current correction method to provide a possible standard for NBTI characterization. The method is implemented using standard equipment and yet is able to achieve sub-100-ns delay, the shortest reported to date for a wafer-level setup. Unlike the ramped-voltage method for which synchronization of the gate and drain waveforms is critical, relative delay between the gate and drain signals is not a concern in our case since measurement is made during quasi-steady state. For the present setup, gate and drain signals are shown to ldquostabilizerdquo after ~50 ns (upon switching) for a gate capacitive load of 1.5 pF (equivalent to ~80 devices used in this letter), rendering parallel testing possible using a single gate voltage source. Extension of the method for direct threshold voltage extraction by the constant subthreshold drain current approach is also discussed.
  • Keywords
    integrated circuit testing; wafer-scale integration; NBTI; direct threshold voltage extraction; drain signals; gate capacitive load; parallel testing; ramped-voltage method; relative delay; single gate voltage source; standard equipment; ultrafast measurement; wafer-level setup; Bias-temperature instability; fast recovery; quasi-real-time; time-critical measurement;
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/LED.2008.2011060
  • Filename
    4785196