A fast lock digital phase-locked-loop architecture for wireless applications

Author

Fahim, Amr M. ; Elmasry, Mohamed I.

Author_Institution

Electr. & Comput. Eng. Dept., Univ. of Waterloo, Ont., Canada

Volume

50

Issue

2

fYear

2003

Firstpage

63

Lastpage

72

Abstract

A fast lock digital phase-locked-loop (PLL) frequency synthesizer for wireless applications is reported. The main advantages of the architecture include small area and digitally selectable frequency resolution. Also, a fully digital solution to reducing the phase lock time is introduced. This work is also supported by a nonlinear analytical analysis of the locking mechanism for PLLs.

Keywords

digital integrated circuits; digital phase locked loops; frequency synthesizers; mobile radio; radio equipment; wireless LAN; digital phase-locked-loop; digitally selectable frequency resolution; fast lock digital PLL frequency synthesizer; locking mechanism; nonlinear analytical analysis; phase lock time reduction; wireless communication applications; Channel spacing; Charge pumps; Filters; Frequency conversion; Frequency synthesizers; Ground penetrating radar; Phase frequency detector; Phase locked loops; Transceivers; Voltage control;

fLanguage

English

Journal_Title

Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on

Publisher

ieee

ISSN

1057-7130

Type

jour

DOI

10.1109/TCSII.2003.809711

Filename

1189198