DocumentCode
1165186
Title
On-Chip Testing Techniques for RF Wireless Transceivers
Author
Valdes-Garcia, Alberto ; Silva-Martinez, Jose ; Sánchez-Sinencio, Edgar
Author_Institution
IBM Thomas J. Watson Res. Center, NY
Volume
23
Issue
4
fYear
2006
fDate
4/1/2006 12:00:00 AM
Firstpage
268
Lastpage
277
Abstract
This article describes a set of on-chip testing techniques and their application to integrated wireless RF transceivers. The objective is to reduce final product cost and accelerate time to market by providing means of testing the entire transceiver system as well as its major building blocks without using off-chip analog or RF instrumentation. On-chip test devices fabricated in a standard CMOS process and experimentally evaluated support the proposed test strategy
Keywords
CMOS integrated circuits; integrated circuit testing; radiofrequency integrated circuits; system-on-chip; transceivers; on-chip testing; product cost reduction; standard CMOS process; time-to-market; wireless RF transceiver; Automatic testing; Baseband; Built-in self-test; Cost function; Life estimation; Radio frequency; Semiconductor device testing; System testing; Transceivers; Wireless communication; Built-in test; Loop-back test; RF test; Wireless Transceivers;
fLanguage
English
Journal_Title
Design & Test of Computers, IEEE
Publisher
ieee
ISSN
0740-7475
Type
jour
DOI
10.1109/MDT.2006.100
Filename
1683713
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