Title :
Selectively deposited nickel film for via filling
Author :
Pai, Pei-Lin ; Ting, Chiu H.
Author_Institution :
Intel Corp., Santa Clara, CA, USA
fDate :
6/1/1989 12:00:00 AM
Abstract :
A selective deposition process is used to fill vias in VLSI multilevel interconnection. Ni film is chosen as the via-filling material because of its compatibility with the underlying Al film. The vias are filled with a thin Pd film first and a thick Ni film. The deposited Ni film is uniform and smooth in the via regions. This film is not attacked by the plasma etch used in subsequent Al patterning; therefore, the design rule of overlapping the second metal on vias can be relaxed. The specific via resistance of this process is 4*10/sup -9/ Omega -cm/sup 2/. The via resistance increases about 30% after an exposure to 450 degrees C for 8 h.<>
Keywords :
VLSI; integrated circuit technology; metallisation; nickel; 450 C; 8 h; Al patterning; Ni film; Ni-Pd-Al layers; VLSI multilevel interconnection; compatibility; design rule of overlapping; fill vias; multilevel metallisation; plasma etch; selective deposition process; specific via resistance; underlying Al film; via filling; via resistance; via-filling material; Artificial intelligence; Dielectric films; Etching; Filling; Integrated circuit interconnections; Nickel; Semiconductor films; Substrates; Surface cleaning; Very large scale integration;
Journal_Title :
Electron Device Letters, IEEE
