Title :
A 120-MHz–1.8-GHz CMOS DLL-Based Clock Generator for Dynamic Frequency Scaling
Author :
Kim, In-Han ; Kwak, Young-Ho ; Kim, Mooyoung ; Kim, Soo-Won ; Kim, Chulwoo
Author_Institution :
Dept. of Electron. Eng., Korea Univ., Seoul
Abstract :
A delay-locked loop (DLL)-based clock generator for dynamic frequency scaling has been developed in a 0.35-mum CMOS technology. The proposed clock generator can generate clock signals ranging from 120 MHz to 1.8 GHz and change the frequency dynamically in a short time. If the clock generator scales its output frequency dynamically by programming with the same last bit, it takes only one clock cycle to lock. In addition, the clock generator inherits advantages of a DLL. The proposed DLL-based clock generator occupies 0.07 mm2 and has a peak-to-peak jitter of plusmn6.6 ps at 1.3 GHz
Keywords :
CMOS integrated circuits; clocks; delay lock loops; signal generators; 0.12 to 1.8 GHz; 0.35 micron; CMOS technology; DLL-based clock generator; clock signals; delay-locked loop-based clock generator; dynamic frequency scaling; CMOS technology; Capacitance; Clocks; Delay; Frequency conversion; Frequency synthesizers; Jitter; Local oscillators; Signal generators; Voltage; Clock generator; DLL-based frequency multiplication; delay-locked loop (DLL); fast lock; low jitter;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2006.880609
