CMOS inter-chip interconnection circuit using high-T/sub c/ superconducting tunnel junctions and interconnections

Author

Ghoshal, Uttam

Author_Institution

MCC Superconductivity Program, Austin, TX, USA

Volume

10

Issue

8

fYear

1989

Firstpage

373

Lastpage

376

Abstract

The analysis of a possible low-voltage CMOS interconnection circuit utilizing high-T/sub c/ superconducting tunnel junctions (TJs) and interconnections for very-high-speed interchip communication at low temperatures (4-77 K) is presented. The circuit uses tunnel junctions as diodes to clip voltage swings between well-controlled levels defined by the energy gaps of the high-T/sub c/ materials. The circuit dissipates five to eight times less power than conventional designs, produces very small current transients, and has good immunity to noise from input voltage fluctuations, crosstalk, and simultaneous switching of drivers.<>

Keywords

CMOS integrated circuits; high-temperature superconductors; integrated circuit technology; superconducting junction devices; 4 to 77 K; CMOS inter-chip interconnection circuit; current transients; diodes; high temperature superconductor; noise immunity; power dissipation; superconducting interconnections; superconducting tunnel junctions; very-high-speed interchip communication; voltage swings; Circuit noise; Crosstalk; Diodes; Integrated circuit interconnections; Josephson junctions; Superconducting device noise; Superconducting materials; Switching circuits; Temperature; Voltage fluctuations;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/55.31761

Filename

31761