DocumentCode
116752
Title
A functional verification system of IP-blocks in network protocols
Author
Shakhmatov, A.V. ; Khanov, V.Kh. ; Chekmarev, S.A.
Author_Institution
Siberian State Aerosp. Univ. named after academician M.F. Reshetnev, Krasnoyarsk, Russia
fYear
2014
fDate
2-4 Oct. 2014
Firstpage
638
Lastpage
642
Abstract
The functional verification problem of IP blocks of network protocols controllers is considered. The application of the verification method using fully-functional models of the processor and the internal bus of a system-on-chip is justified. Principles of construction of a verification system based on the given approach are proposed. As an example, the verification of IP block of RMAP-protocol controller of SpaceWire network is presented.
Keywords
protocols; system-on-chip; IP blocks; RMAP-protocol controller; SpaceWire network; functional verification system; network protocols controllers; system-on-chip; Codecs; Computational modeling; Field programmable gate arrays; IP networks; Protocols; Software; System-on-chip; IP-blocks of network protocols; functional verification; methods and system of verification;
fLanguage
English
Publisher
ieee
Conference_Titel
Actual Problems of Electronics Instrument Engineering (APEIE), 2014 12th International Conference on
Conference_Location
Novosibirsk
Print_ISBN
978-1-4799-6019-4
Type
conf
DOI
10.1109/APEIE.2014.7040764
Filename
7040764
Link To Document