DocumentCode
1167778
Title
Minimum-size effects in asymmetric tilt-angle-implanted LDD-WNx-GaAs MESFET´s
Author
Steiner, Klaus ; Mikami, Hitoshi ; Kitaura, Yoshiaki ; Uchitomi, Naotaki
Author_Institution
Toshiba Corp., of Kawasaki, Japan
Volume
38
Issue
8
fYear
1991
fDate
8/1/1991 12:00:00 AM
Firstpage
1730
Lastpage
1736
Abstract
Asymmetric tilt-angle-implanted lightly doped drain (LDD)-WNx -GaAs MESFETs with an optimized transconductance performance are discussed. A tilt-angle implantation is used to reduce the parasitic source resistance below the gate sidewall without increasing short- and narrow-channel effects. This leads to a transconductance increase of nearly 25% for submicrometer FETs while the gate-source capacitance increase is almost negligible. The influence of the implantation angle on the threshold voltage transconductance, and Schottky-barrier characteristics is reported
Keywords
III-V semiconductors; Schottky gate field effect transistors; field effect integrated circuits; gallium arsenide; integrated circuit technology; ion implantation; large scale integration; semiconductor doping; GaAs; LDD; MESFETs; Schottky-barrier characteristics; WNx-GaAs; asymmetric tilt-angle-implanted; gate sidewall; gate-source capacitance; lightly doped drain; minimum size effects; narrow-channel effects; optimized transconductance performance; parasitic source resistance; semiconductors; short channel effects; submicrometer FETs; threshold voltage; transconductance increase; FETs; Gallium arsenide; Large scale integration; Logic circuits; MESFET circuits; MESFET integrated circuits; Optical device fabrication; Parasitic capacitance; Threshold voltage; Transconductance;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/16.119007
Filename
119007
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