A 0.1-μA standby current, ground-bounce-immune 1-Mbit CMOS SRAM

Author

Ando, Manabu ; Okazawa, Takeshi ; Furuta, Hiroshi ; Ohkawa, Masayoshi ; Monden, Junji ; Kodama, Noriaki ; Abe, Kazuhiko ; Ishihara, Hiroyasu ; Sasaki, Isao

Author_Institution

NEC Corp., Kanagawa, Japan

Volume

24

Issue

6

fYear

1989

fDate

12/1/1989 12:00:00 AM

Firstpage

1708

Lastpage

1713

Abstract

A 1-Mb CMOS static RAM (SRAM) that has very high immunity against ground bounce has been developed. The novel circuit techniques of the multiple clock generator configuration and the optimization of the transient response characteristics of the clock generators have been developed for the ground-bounce immunity. A thin-film transistor has been used as a memory cell load device instead of the conventional polysilicon resistor. The access time of the SRAM is 35 ns and the standby current is 0.1 μA. The memory cell size is 41.08 μm²

Keywords

CMOS integrated circuits; integrated memory circuits; random-access storage; 0.1 muA; 1 Mbit; 35 ns; CMOS SRAM; access time; ground-bounce immunity; memory IC; memory cell load device; multiple clock generator; response optimisation; standby current; static RAM; thin-film transistor; transient response characteristics; Character generation; Clocks; Driver circuits; Pulse amplifiers; Pulse generation; Pulse width modulation inverters; Random access memory; Space vector pulse width modulation; Thin film transistors; Transient response;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.45009

Filename

45009