DocumentCode :
116814
Title :
ALU design problems research with VLSI CAD “Kovcheg 2.2”
Author :
Bogomolov, B.K. ; Gilgenberg, V.V.
Author_Institution :
Novosibirsk State Tech. Univ., Novosibirsk, Russia
fYear :
2014
fDate :
2-4 Oct. 2014
Firstpage :
84
Lastpage :
87
Abstract :
In paper possibility of ALU´s realization on MPGA 5503 XM2 developed on microprocessor MOS Technology 6502 (USA) first demonstrated. Design cycle of ALU has been done, including modeling of truth table and topology formation. Shown, that 5503 library is functionally complete and support effective design of all components of 6502 microprocessor´s ALU.
Keywords :
MOS integrated circuits; VLSI; integrated circuit design; logic circuits; microprocessor chips; technology CAD (electronics); ALU design; MPGA 5503 XM2; USA; VLSI CAD Kovcheg 2.2; arithmetic-logic unit; microprocessor MOS Technology 6502; topology formation; truth table modeling; Design automation; Libraries; Microprocessors; Solid modeling; Topology; Very large scale integration; ALU; logic elements library; microprocessor; modeling; topology;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Actual Problems of Electronics Instrument Engineering (APEIE), 2014 12th International Conference on
Conference_Location :
Novosibirsk
Print_ISBN :
978-1-4799-6019-4
Type :
conf
DOI :
10.1109/APEIE.2014.7040783
Filename :
7040783
Link To Document :
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