Title :
A Highly Flexible Hardened RTL Processor Core Based on LEON2
Author :
Portolan, Michele ; Léveugle, Regis
Author_Institution :
TIMA Lab.
Abstract :
We present a hardened RTL processor core based on Leon2. Modifications are done at RT-level to achieve high configurability in an early stage of the development process. The main parts of the processor core can be protected against Single Event Upsets and Single Event Transients. Results and tradeoffs are presented and discussed
Keywords :
error detection; fault tolerance; integrated circuit design; microprocessor chips; radiation hardening (electronics); transients; Leon2; RTL processor core hardening; design flow; error detection; fault tolerance; microprocessors; register transfer level; single event transient; single event upset; Aerospace electronics; Circuits; Electrical fault detection; Fault detection; Fault tolerance; Microprocessors; Protection; Registers; Single event transient; Single event upset; Error detection; RTL specifications; fault tolerance; microprocessors;
Journal_Title :
Nuclear Science, IEEE Transactions on
DOI :
10.1109/TNS.2006.876508
