Title :
The Stacked Capacitor DRAM Cell and Three-Dimensional Memory
Author :
Koyanagi, Mitsumasa
Author_Institution :
Department of Bioengineering and Robotics, Tohoku University, Japan
Abstract :
The author chronicles the development of the stacked three-dimensional (3D) DRAM cell, highlighting his role in solving the problems of memory data-bandwidth and forecasting a dramatic increase in memory capacity based on his current work using "super-chip" integration technology.
Keywords :
Capacitance; Capacitors; Electrodes; Insulators; Random access memory; Silicon; Transistors;
Journal_Title :
Solid-State Circuits Society Newsletter, IEEE
DOI :
10.1109/N-SSC.2008.4785690
