Dynamic degradation in MOSFET´s. II. Application in the circuit environment

Author

Weber, Werner ; Brox, Martin ; Künemund, Thomas ; Muhlhoff, M. ; Schmitt-Landsiedel, Doris

Author_Institution

Siemens AG, Muenchen, Germany

Volume

38

Issue

8

fYear

1991

fDate

8/1/1991 12:00:00 AM

Firstpage

1859

Lastpage

1867

Abstract

For pt.I, see ibid., vol.38 no.8, pp.1852-1858, Aug. 1991. The physical effects discussed in Pt.I are classified with respect to real operation of devices in circuits from an engineer´s viewpoint. Stress results from different kinds of logic stages are discussed and relations set up between static and dynamic lifetimes. It is shown that within certain limited error boundaries, the static approach is essentially valid as long as stress conditions are considered that are oriented to operation in digital logic. The transmission gate is investigated separately, because in this case specific phenomena caused by bidirectional stress must be considered

Keywords

CMOS integrated circuits; digital integrated circuits; insulated gate field effect transistors; reliability; semiconductor device models; MOSFETs; bidirectional stress; circuit environment; digital logic; dynamic degradation; dynamic lifetimes; engineer´s viewpoint; physical effects; real operation of devices in circuits; static approach; stress conditions; transmission gate; Cost function; Degradation; Hot carrier effects; Hot carriers; Logic devices; MOSFET circuits; Manufacturing processes; Random access memory; Stress; Vehicle dynamics;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.119026

Filename

119026