Design approach using tunnel diodes for lowering power in differential comparators

Adding two clocked tunnel diode pairs to the output ports of a differential amplifier enables high-speed current-mode switching at a lower tail current than in a transistor-only differential pair. The addition of the tunnel diodes also lowers the output open-circuit time constant of the differential pair leading to faster switching speed. As a design example, a return-to-zero D flip-flop is simulated for use as the decision circuit in a single-bit oversampling digital-to-analog converter. Indium phosphide-based heterojunction bipolar transistors and resonant tunneling diodes are used in the model simulation; both conventional and tunnel-diode-augmented circuits are compared. Power dissipation of 3.5 mW/latch at 100-GHz clock frequency with 60-dBc spur-free dynamic range (SFDR) is obtained in the tunnel diode/transistor flip-flop. In comparison with the transistor-only approach, power is reduced by approximately 1.6× at the same speed and SFDR.