Limit cycles due to adder overflow in digital filters

In this paper we study the control of the amplitude of () EA limit cycles due to adder overflow which occur in the zero-input response of second-order digital filters. We consider a digital filter model in which the effects of quantization (i.e., roundoff, truncation, etc.) are included. Our analysis is sufficiently general in character that consideration is given to a wide variety of types of arithmetic. In addition to our new results, virtually all of the previously known results concerning such limit cycles also follow from our analysis. Since our results are all obtained by a single technique, the work thus tends to unify the body of knowledge in this area. Furthermore, our technique is easily generalized, and there is reason to believe that such generalizations could also be profitably applied to the analysis of higher order systems.