DocumentCode
1170642
Title
Design considerations for p-i-n thyristor structures
Author
Dutta, Ranadeep ; Rothwarf, Allen
Author_Institution
Dept. of Electr. & Comput. Eng., Drexel Univ., Philadelphia, PA, USA
Volume
7
Issue
2
fYear
1992
fDate
4/1/1992 12:00:00 AM
Firstpage
430
Lastpage
435
Abstract
An analysis of a high-voltage gate turn-off (GTO) thyristor structure with a double-layered n base (p-i-n structure) is presented. From integration of Poisson´s equation, an expression for the forward-blocking voltage at the onset of avalanche breakdown is obtained. Simple design criteria are developed to calculate the optimal thickness and doping density of the n base of a conventional pnpn structure designed for a specific voltage-blocking capability. The same principle is applied to design for the doping densities and thicknesses of the high-resistivity region and the buffer layer of the p-i-n GTO structure. The forward-blocking voltage, as well as the on-state voltage (at a current density of 300 A cm-2) is predicted for a wide range of base layer thicknesses and doping densities to illustrate the available tradeoff options. Lowest on-state power dissipation for high blocking voltages (>6000 V) is predicted for a doping level of 5×1012 cm-3 in the high-resistivity layer
Keywords
carrier density; integration; semiconductor device models; semiconductor doping; thyristors; GTO; HV; Poisson´s equation; avalanche breakdown; buffer layer; current density; design; doping density; forward-blocking voltage; high-resistivity region; integration; on-state power dissipation; on-state voltage; p-i-n thyristor; semiconductor device models; thickness; Anodes; Avalanche breakdown; Breakdown voltage; Buffer layers; Current density; Doping; PIN photodiodes; Poisson equations; Power dissipation; Thyristors;
fLanguage
English
Journal_Title
Power Electronics, IEEE Transactions on
Publisher
ieee
ISSN
0885-8993
Type
jour
DOI
10.1109/63.136262
Filename
136262
Link To Document