• DocumentCode
    1170668
  • Title

    Monte Carlo simulation of p- and n-channel GOI MOSFETs by solving the quantum Boltzmann equation

  • Author

    Du, Gang ; Liu, Xiaoyan ; Xia, Zhiliang ; Kang, Jinfeng ; Wang, Yi ; Han, Ruqi ; Yu, Hongyu ; Kwong, Dim-Lee

  • Author_Institution
    Inst. of Microelectron., Peking Univ., Beijing, China
  • Volume
    52
  • Issue
    10
  • fYear
    2005
  • Firstpage
    2258
  • Lastpage
    2264
  • Abstract
    The scaling characteristics of both n- and p-channel Ge-on-insulator (GOI) as well as silicon-on-insulator (SOI) MOSFETs with channel length ranging from 20-130 nm are studied by a two-dimensional self-consistent fullband Monte Carlo device simulator. The transistors´ intrinsic performance and subthreshold characteristics are investigated for various channel lengths and Ge layer thicknesses. Our results indicate that both n- and p-channel GOI MOSFETs can be scaled down to the nanoregion, due to the nonstationary transport, especially for the p-channel device. More than 10% performance improvement for nMOS and about 20% for pMOS can be achieved in GOI even when channel length is scaled down to 20 nm, as compared to SOI devices. However, the GOI devices suffer from more severe short channel effect and have larger p-n junction leakage current as compared to SOI counterpart. For high-performance CMOS applications, GOI devices are feasible if the junction leakage can be reduced by optimizing the device structure.
  • Keywords
    Boltzmann equation; MOSFET; Monte Carlo methods; elemental semiconductors; germanium; leakage currents; semiconductor device models; silicon-on-insulator; 20 to 130 nm; 2D self-consistent fullband Monte Carlo device simulator; Monte Carlo simulation; SOI MOSFET; germanium-on-insulator; n-channel GOI MOSFET; nonstationary transport; p-channel GOI MOSFET; quantum Boltzmann equation; silicon-on-insulator; Boltzmann equation; CMOS technology; Degradation; Leakage current; MOS devices; MOSFET circuits; Monte Carlo methods; Nanoscale devices; P-n junctions; Silicon on insulator technology; Ge-on-insulator (GOI); MOSFET; Monte Carlo (MC) simulation;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2005.856806
  • Filename
    1510917