Title :
Depletion layer of gate poly-Si
Author :
Watanabe, Hiroshi
Author_Institution :
Adv. LSI Technol. Lab., Toshiba Corp., Yokohama, Japan
Abstract :
The depletion effects of gate poly-Si are investigated in detail taking into consideration the fact that many-body effects due to carrier-carrier and carrier-ion interactions are different at the surface than in a bulk of the gate poly-Si. All calculations are self-consistently performed including an incomplete ionization of activated impurities in an iterative manner. As a result, it is found that the surface part of these interactions affects the equivalent oxide thickness determined by the capacitance-voltage fitting, and that the bulk part affects the determination of flat band potential. It is also found that the surface of the gate poly-Si is incompletely depleted, and the depletion layer is then wider than calculated when assuming the complete depletion (NS/ND). The width of the incomplete depletion layer is studied in detail for the first time.
Keywords :
MIS devices; capacitance; semiconductor device models; semiconductor doping; semiconductor junctions; Si; carrier-carrier interactions; carrier-ion interactions; depletion layer; gate poly-Si; incomplete ionization; many body effects; metal insulator structures; Capacitance; Charge carrier density; Doping; Impurities; Ionization; Lattices; MOSFETs; Semiconductor process modeling; Silicon; Surface fitting; Depletion layer; MOS devices; gate poly-Si; metal–insulator structures; silicon;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2005.856791