Title :
High speed multipliers using nested higher order compressors
Author :
Rebala, Neelakanteshwar Reddy ; Tirumala, Bala Krishna
Author_Institution :
Sch. of Electron. Eng., VIT Univ., Vellore, India
Abstract :
Lot of applications today employ multipliers to do many simple and complex jobs, from mathematical calculations to signal processing. But we only employ lower order compressors for this operation. This gives us lot of delay. The proposed paper puts to usage, higher order compressors for the same purpose. This results in reduced delay and improves efficiency greatly.
Keywords :
logic circuits; high speed multipliers; lower order compressors; mathematical calculations; nested higher order compressors; signal processing; Adders; Compressors; Computers; Delays; Educational institutions; Informatics; Signal processing; High speed Multipliers; higher order compressors; nested compressors;
Conference_Titel :
Computer Communication and Informatics (ICCCI), 2014 International Conference on
Conference_Location :
Coimbatore
Print_ISBN :
978-1-4799-2353-3
DOI :
10.1109/ICCCI.2014.6921810
