Title :
Guest editorial: System-level interconnect prediction
Author_Institution :
Philips Research Laboratories
Keywords :
Delay estimation; Paper technology; Polynomials; Predictive models; Programmable logic devices; Routing; Sections; Very large scale integration; Wire; Wiring;
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
DOI :
10.1109/TVLSI.2003.810753
