DocumentCode :
1171159
Title :
Prediction of product yield distributions from wafer parametric measurements of CMOS circuits
Author :
Mizrukhin, Leonid ; Heuy, J. ; Mehta, Sunil
Author_Institution :
Fujitsu Microelectron. Inc., San Jose, CA, USA
Volume :
5
Issue :
2
fYear :
1992
fDate :
5/1/1992 12:00:00 AM
Firstpage :
88
Lastpage :
93
Abstract :
A technique for predicting the yield distribution of CMOS circuits based on electrical parameter distributions is presented. This technique uses the mean and standard deviation of the measured threshold voltage and mobility of NMOS and PMOS transistors to project the yield of the circuit in a specified design window. The method thus provides a quantitative means of carrying out tradeoffs between design windows and final product yield
Keywords :
CMOS integrated circuits; integrated circuit manufacture; CMOS circuits; design windows; electrical parameter distributions; mean; mobility measurements; product yield distributions; speed yield tradeoff; standard deviation; threshold voltage measurements; tradeoffs; wafer parametric measurements; yield distribution prediction; Circuit testing; Electric variables measurement; MOS devices; MOSFETs; Measurement standards; Packaging; Semiconductor device modeling; Threshold voltage; Virtual manufacturing; Voltage measurement;
fLanguage :
English
Journal_Title :
Semiconductor Manufacturing, IEEE Transactions on
Publisher :
ieee
ISSN :
0894-6507
Type :
jour
DOI :
10.1109/66.136268
Filename :
136268
Link To Document :
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