Title :
A variable-radix digit-serial design methodology and its application to the discrete cosine transform
Author :
Leong, M.P. ; Leong, Philip H W
Author_Institution :
Dept. of Comput. Sci. & Eng., Chinese Univ. of Hong Kong, China
Abstract :
A variable-radix digit-serial design methodology and its application to the implementation of a systolic structure for computing the discrete cosine transform is presented. Based on the parameters supplied by a user, different fixed-point designs can be derived from a single floating-point description where tradeoffs among quantization effects, throughput, latency, and area can be addressed. The resulting hardware implementations have variables of different wordlengths and operators of different radices. This design methodology enables efficient exploration of a complex design space to determine the most suitable implementation for a particular application.
Keywords :
VLSI; circuit CAD; digital signal processing chips; discrete cosine transforms; field programmable gate arrays; fixed point arithmetic; integrated circuit design; logic CAD; systolic arrays; DCT; FPGAs; area minimization; complex design space; design automation; discrete cosine transform; field-programmable gate arrays; fixed-point designs; hardware implementations; latency; quantization effects; single floating-point description; synthesizable VHDL code; systolic structure; throughput; variable-radix digit-serial design methodology; CMOS technology; Delay; Design methodology; Discrete cosine transforms; Field programmable gate arrays; Hardware; Quantization; Space exploration; Throughput; Very large scale integration;
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
DOI :
10.1109/TVLSI.2003.811099
