Title :
Wave steering to integrate logic and physical syntheses
Author :
Mukherjee, Arindam ; Marek-Sadowska, Malgorzata
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of California, Santa Barbara, CA, USA
Abstract :
Wave steering is a unified logic and physical synthesis scheme that algorithmically generates high-throughput circuits with fast turn-around times. Binary decision diagram (BDD)-type structures are altered to satisfy certain electrical constraints, embedded in silicon with pass transistor logic (PTL), and pipelined to very fine granularity using a novel two-phase clocking scheme. This direct PTL mapping of a logic representation provides good electrical estimations to a front-end tool like the logic synthesizer at an early phase of the design cycle. We apply our wave steering technique to high throughput computation-intensive datapath combinational circuits. We achieve an average speedup of 4.2 times compared to standard cell (SC) implementations of high performance arithmetic circuits at the cost of only about 76% average increase in area. The results look extremely encouraging; all the more so, considering that we also achieve an average reduction of 27% in latency and 15% in power compared to SC circuits.
Keywords :
CMOS logic circuits; VLSI; binary decision diagrams; circuit CAD; combinational circuits; high level synthesis; logic CAD; network routing; pipeline arithmetic; timing; BDD-type structures; PTL mapping; VLSI; binary decision diagram; computation-intensive combinational circuits; datapath combinational circuits; electrical constraints; fast turn-around times; high performance arithmetic circuits; high-throughput circuit generation; logic representation; pass transistor logic; static CMOS combinational circuits; two-phase clocking scheme; unified logic/physical synthesis scheme; very fine granular pipelining; wave steering technique; Boolean functions; Circuit synthesis; Clocks; Data structures; Logic circuits; Logic design; Phase estimation; Silicon; Synthesizers; Throughput;
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
DOI :
10.1109/TVLSI.2003.811100