Constrained multiobjective optimization based design of CMOS ring oscillator

Author

Rout, Prakash Kumar ; Acharya, Debiprasad Priyabrata ; Panda, Ganapati

Author_Institution

Dept. of Electron. & Commun. Eng., NIT Rourkela, Rourkela, India

fYear

2014

fDate

3-5 Jan. 2014

Firstpage

1

Lastpage

5

Abstract

In this paper a popular multiobjective optimization Non-dominated Sorting Genetic Algorithm (NSGA-II) based integrated circuit design methodology using simple equation models is presented. The method is applied to CMOS ring oscillator circuit where the design parameters are estimated so that the circuit offers optimal performance. The circuit is designed using these parameters in Cadence Virtuoso Analog Design Environment (ADE) with GPDK 90nm process to test the predicted performance. The proposed method saves the design cycle time ensuring the optimal performance of the CMOS ring oscillator in a constrained environment.

Keywords

CMOS analogue integrated circuits; circuit optimisation; genetic algorithms; integrated circuit design; oscillators; CMOS ring oscillator; Cadence Virtuoso Analog Design Environment; GPDK process; constrained multiobjective optimization; integrated circuit design; nondominated sorting genetic algorithm; size 90 nm; CMOS integrated circuits; Integrated circuit modeling; Layout; Optimization; Phase noise; Ring oscillators; Semiconductor device modeling; Analog and mixed signal (AMS) circuit; CMOS Ring Oscillator (CMOS RO); Non-dominated Sorting Genetic Algorithm (NSGA-II);

fLanguage

English

Publisher

ieee

Conference_Titel

Computer Communication and Informatics (ICCCI), 2014 International Conference on

Conference_Location

Coimbatore

Print_ISBN

978-1-4799-2353-3

Type

conf

DOI

10.1109/ICCCI.2014.6921830

Filename

6921830