Constrained multiobjective optimization based design of CMOS ring oscillator

In this paper a popular multiobjective optimization Non-dominated Sorting Genetic Algorithm (NSGA-II) based integrated circuit design methodology using simple equation models is presented. The method is applied to CMOS ring oscillator circuit where the design parameters are estimated so that the circuit offers optimal performance. The circuit is designed using these parameters in Cadence Virtuoso Analog Design Environment (ADE) with GPDK 90nm process to test the predicted performance. The proposed method saves the design cycle time ensuring the optimal performance of the CMOS ring oscillator in a constrained environment.