Design procedures for a fully differential folded-cascode CMOS operational amplifier

Author

Mallya, Sudhir M. ; Nevin, Joseph H.

Author_Institution

Dept. of Electr. & Comput. Eng., Cincinnati Univ., OH, USA

Volume

24

Issue

6

fYear

1989

fDate

12/1/1989 12:00:00 AM

Firstpage

1737

Lastpage

1740

Abstract

A fully differential folded-cascode op. amp. is analyzed, and the results are presented in the form of design equations and procedures. Tradeoffs among such factors as bandwidth, gain, phase margin, bias currents, signal swing, slew rate, and power are made evident. Closed-form expressions are developed, and a sequence of design steps is established. A graphical representation of the relationships among the gain, power, and phase margin for different capacitive loadings is presented to illustrate visually one form of design optimization. The results of SPICE simulations are shown to agree very well with the design equations presented

Keywords

CMOS integrated circuits; differential amplifiers; linear integrated circuits; operational amplifiers; CMOS operational amplifier; SPICE simulations; bandwidth; bias currents; capacitive loadings; design equations; design optimization; fully differential folded-cascode; gain; linear IC; monolithic type; op. amp.; phase margin; power; signal swing; slew rate; Bandwidth; Capacitance; Differential amplifiers; Differential equations; Equivalent circuits; Frequency response; Operational amplifiers; Solid state circuit design; Transconductance; Transfer functions;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.45013

Filename

45013