Title :
A highly flexible sea-of-gates structure for digital and analog applications
Author :
Duchene, Philippe ; Declercq, Michel J.
Author_Institution :
Electron. Lab., ETH, Lausanne, Switzerland
fDate :
6/1/1989 12:00:00 AM
Abstract :
A sea-of-gates structure optimized for digital random logic applications as well as for regular arrays and analog circuits is described. Associated with a dedicated design procedure and a systematic metallization strategy, the structure features a full cell-abutment capability and true channelless routing. After reviewing the advantages and limitations of currently available arrays, the main characteristics of the array architecture are presented, and applications to different circuit families are detailed. Design automation tools suited to the structure and design methodology are reviewed. Design results and performance are presented for several macroblocks and are compared with other semicustom approaches. A set of rules which allows an automatic transformation of the sea-of-gates layout into a topologically equivalent full-custom layout, converting semicustom prototypes to full-performance circuits, is presented
Keywords :
application specific integrated circuits; cellular arrays; circuit CAD; circuit layout CAD; linear integrated circuits; logic CAD; logic arrays; ASIC; CAD; analog applications; array architecture; automatic transformation; dedicated design procedure; design automation tools; digital random logic applications; full cell-abutment capability; gate arrays; macroblocks; sea-of-gates structure; semicustom prototypes; systematic metallization strategy; topologically equivalent full-custom layout; true channelless routing; Analog circuits; Application specific integrated circuits; Design automation; Design methodology; Fabrication; Logic arrays; Logic circuits; Metallization; Prototypes; Routing;
Journal_Title :
Solid-State Circuits, IEEE Journal of
