DocumentCode :
1171729
Title :
A 1-Mbit BiCMOS DRAM using temperature-compensation circuit techniques
Author :
Kitsukawa, Goro ; Itoh, Kiyoo ; Hori, Ryoichi ; Kawajiri, Yoshiki ; Watanabe, Takao ; Kawahara, Takayuki ; Matsumoto, Tetsuro ; Kobayashi, Yutaka
Author_Institution :
Hitachi Ltd., Tokyo, Japan
Volume :
24
Issue :
3
fYear :
1989
fDate :
6/1/1989 12:00:00 AM
Firstpage :
597
Lastpage :
602
Abstract :
A temperature-compensation circuit technique for a dynamic random-access memory (DRAM) with an on-chip voltage limiter is evaluated using a 1-Mb BiCMOS DRAM. It was found that a BiCMOS bandgap reference generator scheme yields an internal voltage immune from temperature and Vcc variation. Also, bipolar-transistor-oriented memory circuits, such as a static BiCMOS word driver, improve delay time at high temperatures. Furthermore, the BiCMOS driver proves to have better temperature characteristics than the CMOS driver. Finally, a 1-Mb BiCMOS DRAM using the proposed technique was found to have better temperature characteristics than the 1-Mb CMOS DRAM which uses similar techniques, as was expected. Thus, BiCMOS DRAMs have improved access time at high temperatures compared with CMOS DRAMs
Keywords :
BIMOS integrated circuits; compensation; integrated memory circuits; random-access storage; reference circuits; 1 Mbit; BiCMOS DRAM; BiCMOS bandgap reference generator; access time improvement; dynamic RAM; high temperatures; on-chip voltage limiter; random-access memory; static BiCMOS word driver; temperature characteristics; temperature-compensation circuit techniques; BiCMOS integrated circuits; Bipolar transistors; Delay effects; Driver circuits; Photonic band gap; Power dissipation; Random access memory; Stress; Temperature; Voltage;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.32013
Filename :
32013
Link To Document :
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