DocumentCode :
1172135
Title :
Investigation of maximum current sensing window for two-side operation, four-bit/cell MLC nitride-trapping nonvolatile flash memories
Author :
Hsu, Tzu-Hsuan ; Lee, Ming-Hsiu ; Wu, Jau-Yi ; Lung, Hsiang-Lan ; Liu, Rich ; Lu, Chih-Yuan
Author_Institution :
Macronix Int. Co. Ltd., Hsinchu, Taiwan
Volume :
25
Issue :
12
fYear :
2004
Firstpage :
795
Lastpage :
797
Abstract :
Localized charges in a nitride-trapping device provide two-bit/cell operations. Adding multilevel-cells (MLCs) to the physical bits produces a four-bit/cell device. However, it is difficult to get sufficient sensing windows for MLC operation because the left bit and right bit interfere with each other. This letter analyzes the effect of the second bit effect and investigates parameters affecting the sensing current window for physical four-bit/cell operations. The sensing window is found to increase with a higher reading bias, and also with a higher programmed Vt. However, severe second bit effects set in at high Vt, and decreased the sensing window again. An optimal sensing window is found at moderately high Vt.
Keywords :
flash memories; NROM; four-bit/cell device; localized charges; maximum current sensing window; multilevel-cells; nitride-trapping device; nonvolatile flash memories; second bit effect; two-bit/cell; two-side operation; Channel hot electron injection; Dielectric substrates; Electron traps; Flash memory; Lungs; MOSFET circuits; Nonvolatile memory; Silicon compounds; Substrate hot electron injection; Tunneling; 65; Four-bit/cell; MLCs; NROM; multilevel cells; nitride-trapping device; second bit effect; two-bit/cell;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/LED.2004.838055
Filename :
1362778
Link To Document :
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