DocumentCode
1172213
Title
A transient analysis method to characterize the trap vertical location in nitride-trapping devices
Author
Lue, Hang-Ting ; Shih, Yen-Hao ; Hsieh, Kuang-Yeu ; Liu, Rich ; Lu, Chih-Yuan
Author_Institution
Emerging Central Lab., Macronix Int. Co., Hsinchu, Taiwan
Volume
25
Issue
12
fYear
2004
Firstpage
816
Lastpage
818
Abstract
A new method to probe the trap vertical location for nitride-trapping devices is proposed. This method requires only measuring the time dependence of gate injection at various gate voltages on a single wafer. The transient current (J) and the instantaneous electric field (E) across the top oxide can be directly obtained based on various cases of trap location. Comparisons can be made to check which case has the best consistency for the J versus E behaviors. The only assumption in this method is that the transient current J and the instantaneous E field should follow a consistent tunneling relationship at different gate voltages. The experimental results show unequivocally that electrons are trapped at the interface between top oxide and nitride for oxide grown by thermal conversion. However, for the direct-deposited top oxide the electrons are more spatially distributed in the nitride. This method is a simple and convincing tool to detect the nitride trap vertical location.
Keywords
electron traps; transient analysis; tunnelling; NROM; SONOS; direct-deposited top oxide; gate injection; gate voltages; instantaneous electric field; nitride trap; nitride-trapping devices; single wafer; thermal conversion; time dependence; transient analysis; transient current; tunneling; vertical location; Electron traps; Nonvolatile memory; Oxidation; Probes; SONOS devices; Thin film devices; Threshold voltage; Time measurement; Transient analysis; Tunneling; 65; NROM; Nitride trap; SONOS; transient analysis; tunneling; vertical location;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/LED.2004.839225
Filename
1362785
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